SEL25=0, SEL24=0
Crossbar Select Register 12
| SEL24 | Input (XBAR_INn) to be muxed to XBAR_OUT24 (refer to Functional Description section for input/output assignment) 0 (0): Logic 1 (VDD) 1 (1): Logic 0 (VSS) 2 (2): AFE modulator clock output 3 (3): AFE modulator 0 data output 4 (4): LPTimer Output 5 (5): Clock Output 6 (6): Quad Timer channel 0 output 7 (7): Quad Timer channel 1 output 8 (8): Quad Timer channel 2 output 9 (9): Quad Timer channel 3 output 10 (10): iRTC Clock Output 11 (11): CMP0 Output 12 (12): CMP1 Output 13 (13): iRTC Alarm Output 14 (14): UART TX Output (after modulation) 15 (15): EWM Output (EWM_OUT) 16 (16): PIT 0 Timer Interrupt Flag 0 (Timeout 0) 17 (17): XBAR Input pin 0 18 (18): XBAR Input pin 1 19 (19): XBAR Input pin 2 20 (20): XBAR Input pin 3 21 (21): XBAR Input pin 4 22 (22): XBAR Input pin 5 23 (23): XBAR Input pin 6 24 (24): XBAR Input pin 7 25 (25): XBAR Input pin 8 26 (26): ORed conversion complete flag for all SAR ADC channels 27 (27): ORed conversion complete flag for all AFE channels 28 (28): AFE Channel 0 conversion complete 29 (29): AFE Channel 1 conversion complete 30 (30): AFE Channel 2 conversion complete 31 (31): AFE Channel 3 conversion complete 32 (32): DMA Done Signal 33 (33): XBAR Input pin 9 34 (34): XBAR Input pin 10 35 (35): CMP2 Output 36 (36): PIT 0 Timer Interrupt Flag 1 (Timeout 1) 37 (37): PIT 1 Timer Interrupt Flag 0 (Timeout 0) 38 (38): PIT 1 Timer Interrupt Flag 1 (Timeout 1) 39 (39): AFE modulator 1 data output 40 (40): AFE modulator 2 data output 41 (41): AFE modulator 3 data output 42 (42): SAR ADC conversion complete A 43 (43): SAR ADC conversion complete B 44 (44): SAR ADC conversion complete C 45 (45): SAR ADC conversion complete D 46 (46): PDB0 CH0 Pre-trigger 0 47 (47): PDB0 CH0 Pre-trigger 1 48 (48): PDB0 CH0 Pre-trigger 2 49 (49): PDB0 CH0 Pre-trigger 3 50 (50): PDB0 CH0 Trigger 51 (51): PDB0 Pulse-Out 0 |
| SEL25 | Input (XBAR_INn) to be muxed to XBAR_OUT25 (refer to Functional Description section for input/output assignment) 0 (0): Logic 1 (VDD) 1 (1): Logic 0 (VSS) 2 (2): AFE modulator clock output 3 (3): AFE modulator 0 data output 4 (4): LPTimer Output 5 (5): Clock Output 6 (6): Quad Timer channel 0 output 7 (7): Quad Timer channel 1 output 8 (8): Quad Timer channel 2 output 9 (9): Quad Timer channel 3 output 10 (10): iRTC Clock Output 11 (11): CMP0 Output 12 (12): CMP1 Output 13 (13): iRTC Alarm Output 14 (14): UART TX Output (after modulation) 15 (15): EWM Output (EWM_OUT) 16 (16): PIT 0 Timer Interrupt Flag 0 (Timeout 0) 17 (17): XBAR Input pin 0 18 (18): XBAR Input pin 1 19 (19): XBAR Input pin 2 20 (20): XBAR Input pin 3 21 (21): XBAR Input pin 4 22 (22): XBAR Input pin 5 23 (23): XBAR Input pin 6 24 (24): XBAR Input pin 7 25 (25): XBAR Input pin 8 26 (26): ORed conversion complete flag for all SAR ADC channels 27 (27): ORed conversion complete flag for all AFE channels 28 (28): AFE Channel 0 conversion complete 29 (29): AFE Channel 1 conversion complete 30 (30): AFE Channel 2 conversion complete 31 (31): AFE Channel 3 conversion complete 32 (32): DMA Done Signal 33 (33): XBAR Input pin 9 34 (34): XBAR Input pin 10 35 (35): CMP2 Output 36 (36): PIT 0 Timer Interrupt Flag 1 (Timeout 1) 37 (37): PIT 1 Timer Interrupt Flag 0 (Timeout 0) 38 (38): PIT 1 Timer Interrupt Flag 1 (Timeout 1) 39 (39): AFE modulator 1 data output 40 (40): AFE modulator 2 data output 41 (41): AFE modulator 3 data output 42 (42): SAR ADC conversion complete A 43 (43): SAR ADC conversion complete B 44 (44): SAR ADC conversion complete C 45 (45): SAR ADC conversion complete D 46 (46): PDB0 CH0 Pre-trigger 0 47 (47): PDB0 CH0 Pre-trigger 1 48 (48): PDB0 CH0 Pre-trigger 2 49 (49): PDB0 CH0 Pre-trigger 3 50 (50): PDB0 CH0 Trigger 51 (51): PDB0 Pulse-Out 0 |